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ASIC backend designer (Graduate)

Retym, Inc

Yerevan, ArmeniaFull-timeNo compensation foundPosted 1mo agoVerified open 3 days ago

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At a glance

Compensation
No compensation found
Location
Yerevan, Armenia
Schedule
Full-time
Work Authorization
Not specified

Requirements

Credentials this posting asks for.

Bachelor's degree

Job overview

Retym, Inc is hiring an ASIC backend designer (Graduate). Retym, Inc. is seeking a Junior ASIC Back-End (Physical Design) Engineer to join their silicon design team. The ideal candidate is a recent graduate or early-career engineer with a strong foundation in VLSI concepts and an interest in ASIC physical implementation and timing closure. This role involves working closely with experienced physical design engineers on block- and chip-level implementation, learning industry-standard flows and tools on advanced 2nm and below tech nodes.

Key focus areas include Work closely with seasoned physical design engineers, Implement block-level designs, and Implement chip-level designs.

Successful candidates bring Bachelor's Degree In Electrical Engineering Or Computer Engineering Or Related Field. Important skills include Digital Logic, CMOS Fundamentals, VLSI Physical Design Concepts, Setup/Hold Timing, Basic STA, and ASIC RTL2GDS Flow. Preferred (not required): Team Player, Highly Motivated, Learning Abilities, and Good Communication.

Skills & qualifications

RequiredNice to have

Skills

Digital LogicCMOS FundamentalsVLSI Physical Design ConceptsSetup/Hold TimingBasic STAASIC RTL2GDS FlowSynthesisFloorplanPlacementCTSRoutingLinux EnvironmentsTcl ScriptingDFT AwarenessTeam PlayerHighly MotivatedLearning AbilitiesGood Communication

Qualifications

Bachelor's Degree in Electrical EngineeringGood Communication in English

Full job description

FWe are looking for a Junior ASIC Back-End (Physical Design) Engineer to join our silicon design team. The ideal candidate is a recent graduate or early-career engineer with a strong foundation in VLSI concepts and an interest in ASIC physical implementation and timing closure.

You will work closely with seasoned physical design engineers on block- and chip-level implementation, learning industry-standard flows and tools on advanced 2nm and below tech nodes.

Requirements:

Minimum Qualifications

  • Bachelor’s degree in electrical engineering, Computer Engineering, or related field
  • Strong understanding of:
  • Digital logic and CMOS fundamentals
  • VLSI physical design concepts
  • Setup/hold timing and basic STA
  • Familiarity with the ASIC RTL2GDS flow: Synthesis → Floorplan → Placement → CTS → Routing
  • Basic experience with Linux environments
  • Basic Tcl scripting skills
  • DFT awareness

Preferred Qualifications

  • Team player
  • Highly motivated
  • Learning abilities
  • Good communication in English

You've read the whole posting — now see how you match it.