Senior Staff Design Verification Engineer
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Job overview
Celestial AI is hiring a Senior Staff Design Verification Engineer. Marvell seeks a senior staff design verification engineer to lead ASIC design, verification, and evaluation of high‑speed SerDes IPs, collaborating across analog, DSP, digital, firmware, and application engineering teams to deliver competitive solutions.
Key focus areas include Design verification for SerDes IPs ranging from 10Gbps to 224Gbps data‑rates, Develop and improve UVM verification environments, and Enhance design methodology and flow.
Successful candidates bring Bachelor's Degree In Computer Engineering Or Electrical Engineering and 6+ Years Related Professional Experience. Important skills include Personal Communication, Team Working Spirit, Hardworking, Motivated, Leadership, and Digital Logic Design. Preferred (not required): VIPs, Formal Verification, PCIe Protocol Knowledge, and UCIe Protocol Knowledge.
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Full job description
Join our talent community to hear about company news, job openings and events. Join our Talent Community! Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Recruitment fraud is a well-known way that third parties try to get personal information or to steal money from you. Please review Marvell’s guidance here to learn more on how you can protect yourself.
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